Waymo reveals its self-driving compute: a custom 5nm ASIC and 1,000+ TOPS

Waymo has pulled back the curtain on the computing platform that runs its autonomous vehicles, disclosing for the first time that it has designed custom silicon rather than relying solely on off-the-shelf parts. The centerpiece is a purpose-built 5nm ASIC that ingests raw lidar, radar, and camera feeds, handling sensor fusion and front-end neural network inference. Waymo says the chip delivers more than 1,000 TOPS dedicated to that early processing stage, including temporal denoising to improve perception in low light. The company frames its whole approach around three constraints—low-latency responsiveness (all decisions made onboard in milliseconds), physical ruggedization (vibration, shock, temperature extremes, tied into the car’s liquid cooling), and full redundancy, with two independent compute units that can each take over if the other faults since there is no human backup.

The design is a heterogeneous, ‘ML-primary’ architecture that pairs the custom accelerators with commercial CPUs, GPUs, and other accelerators for orchestration, data movement, and logging. Waymo claims it has scaled raw compute 20x over eight years and draws on more than 200 million autonomous miles to tune the system for the low-batch inference regimes real-world driving demands. Notably, the custom ASIC is described as just one of several in-house components in development.

The disclosure is as much a positioning statement as a technical reveal. By naming partners including AMD, NVIDIA, Micron, Samsung, TSMC, Socionext, and Sandisk, Waymo signals both the breadth of its supply chain and its intent to scale. The post reads like a recruiting and industry-credibility play—teasing talks at Hot Chips and pointing to open roles—while staking a claim that purpose-built silicon, co-designed with sensors and algorithms, is what separates full self-driving from driver-assist systems.