From Trinidad, an Embedded Engineer Rebuts the Case Against RISC-V

Responding to Dmitry Grinberg’s widely-shared “RISC-V: They Should Have Known Better,” an embedded engineer working out of Trinidad and Tobago concedes several of the technical gripes — the awkward compressed store offsets, Zicsr being a bolt-on extension you have to explicitly request — but argues the critique misses what actually matters. Writing from a place where a one-dollar chip can cost $60 to $200 just to ship, he reframes the debate around access rather than instruction-set elegance. For students in Trinidad, Nigeria, or Bangladesh, cheap and available RISC-V silicon is the difference between every student holding their own board and a class of thirty sharing one demo unit. ISA aesthetics are a luxury you can afford only after the hardware is already on your desk.

He also turns Grinberg’s own reasoning against him. Grinberg derives from first principles what a cheap microcontroller core should be — low interrupt latency, small die area, tight code density, no divider, no privilege separation — and lands squarely on RV32EC, the exact instruction set a ten-cent chip already implements, even conceding that RISC-V will inevitably own the disposable-microcontroller market. The author’s point: Grinberg builds the case for the chip and then spends the rest of the piece irritated that it exists. Whether the outcome was “earned” is irrelevant to anyone choosing what to learn on, because the part is on the shelf regardless.

His sharpest disagreement is with Grinberg’s central premise: that a high-end CPU and a cost-optimized microcontroller need diametrically opposed things, so no single ISA can serve both. He rebuts it with hardware on his desk — the ten-cent CH32V003 (a bare RV32EC part), the dual-core 400 MHz CH32H417 running a web browser and real-time facial recognition without Linux, and the Baochip VexRISC-V SoC with a full MMU and process isolation running Xous, seL4, and Linux, which shipped inside the DEFCON 34 badge. All three span the range from throwaway part to isolation-capable SoC while sharing the same base instruction set, which he offers as living proof that one ISA can scale across the whole spectrum.